1. Field of the Invention
The present invention relates to a ramp signal generating apparatus and method, and more particularly, to a ramp signal generating apparatus and method having a constant frequency despite change in applied VDD voltage while operating with low power.
2. Description of the Related Art
In general, a ramp signal generating apparatus has been widely used to generate a ramp signal for control of an operation of a main analog integrated circuit such as a DC-DC converter, an energy harvesting circuit, or the like.
Such a conventional ramp signal generating apparatus needs a plurality of comparers and digital circuits and needs two reference voltages or more for adjustment of amplitude of a ramp signal. Accordingly, the conventional ramp signal generating apparatus is disadvantageous in terms of high power consumption for driving the ramp signal generating apparatus. In addition, the conventional ramp signal generating apparatus has characteristics whereby a frequency is easily varied when a voltage of used power is changed. Accordingly, an energy harvesting circuit or a DC-DC converter for receiving incomplete power and supplying stable power for a circuit operation has serious difficulty in using the conventional ramp signal generating apparatus.
Thus, currently, there is a need for a circuit having a very simple structure and low power consumption and for stably generating a ramp signal despite unstable power supply compared with the conventional ramp signal generating apparatus.